Third Generation High-Performance DisplayPort Multiplexer

CBTL06DP213 Block Diagram

CBTL06DP213 Block Diagram

The CBTL06DP213 DisplayPort (DP) multiplexer is designed using NXP proprietary high-bandwidth pass-gate technology and it can be used for 1 : 2 switching or 2 : 1 multiplexing of four high-speed differential AC-coupled DP channels. It is an NXP third generation high-performance multi-channel multiplexer, meant for DisplayPort (DP) v1.3 or Embedded DisplayPort applications operating at data rate of 1.62 Gbit/s, 2.7 Gbit/s, 5.4 Gbit/s or 8.1 Gbit/s.

CBTL06DP213 is capable of switching/multiplexing of Hot Plug Detect (HPD) signal as well as Auxiliary (AUX) and Display Data Channel (DDC) signals.  It provides an additional level of multiplexing of AUX and DDC signals delivering true flexibility and choice in order to support GPUs/CPUs that have dedicated AUX and DDC I/Os.

Why Used

  • High-bandwidth analog pass-gate technology
  • Ron on DP high-speed channels: 14 Ω
  • Low crosstalk: -35 dB at 2.7 GHz
  • Low off-state isolation: -30 dB at 2.7 GHz, -25 dB at 4 GHz
  • 1 : 2 switching or 2 : 1 multiplexing of DisplayPort (v1.3 – 8.1 Gbit/s) signals
    • 4 high-speed differential channels with 2 : 1 multiplexing/switching for DisplayPort main link signals
    • 1 channel with 4 : 1 multiplexing/switching for AUX or DDC signals
    • 1 channel with 2 : 1 multiplexing/switching for HPD signal

Where Used

  • Docking stations
  • Notebook computers
  • Motherboard applications requiring DisplayPort and PCI Express switching/multiplexing
  • Chip sets requiring flexible allocation of PCI Express or DisplayPort I/O pins to board connectors

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