Parallel Bus to 1 Channel Fm+ I2C-bus Controller

PCA9661 Block Diagram

PCA9661 Block Diagram

PCA966 is a fourth generation bus controller designed for data intensive I²C-bus data transfer. It is an advanced single master mode I²C-bus controller. As an 8-bit parallel-bus to I²C-bus protocol converter, PCA9661 can be configured to communicate with up to 64 slaves in one serial sequence with no intervention from the CPU. The controller also has a sequence loop control feature that allows it to automatically retransmit a stored sequence.

The controller parallel bus interface runs at 3.3 V and the I²C-bus I/Os logic levels are referenced to a dedicated VDD(IO) input pin with a range of 3.0 V to 5.5 V.

Why Used

  • 1 Mbit/s and up to 30 mA SCL/SDA IOL Fast-mode Plus (Fm+) capability
  • Parallel-bus to I²C-bus protocol converter and interface
  • Internal oscillator trimmed to 1 % accuracy reduces external components
  • 4352-byte buffer for the Fm+ channel
  • Three levels of reset: individual software channel reset, global software reset, global hardware RESET pin

Where Used

  • Entertainment systems
  • LED matrix control
  • Data intensive I²C-bus transfers
  • Add additional I²C-bus ports to controllers/processors that need multiple I²C-bus ports
  • Converts 8 bits of parallel data to serial data stream to prevent having to run a large number of traces across the entire printed-circuit board

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