Monthly Archives: April 2018

Remote 8-bit I/O expander for Fm+ I²C-bus with Reset

PCA9670PW Block Diagram

PCA9670PW Block Diagram

PCA9670PW is a remote 8-bit I/O expander for Fm+ I²C-bus with reset. It provides general-purpose remote I/O expansion via the two-wire bidirectional I²C‑bus (serial clock (SCL), serial data (SDA)). The devices consist of eight quasi-bidirectional ports, 1 MHz 30 mA drive I²C‑bus interface, three hardware address inputs and a reset input operating between 2.3 V and 5.5 V.

The PCA9670 has three hardware address pins and allows up to 64 of these PCA9670 I/O expanders on the same I²C‑bus without the need for bus buffers, supporting up to 512 I/Os (for example, 512 LEDs).

Why Used

  • Operating supply voltage 2.3 V to 5.5 V with 5.5 V tolerant I/Os held to VDD with 100 μA current source
  • I²C‑bus to parallel port expander
  • 1 MHz I²C‑bus interface (Fast-mode Plus I²C‑buss)
  • SDA with 30 mA sink capability for 4000 pF buses
  • 8-bit remote I/O pins that default to inputs at power-up

Where Used

  • Servers
  • Keypads
  • Industrial control
  • LED signs and displays
  • Medical equipment

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High Speed Differential 1-to-2 Switch Chip

CBTU02043 Block Diagram

CBTU02043 Block Diagram

CBTU02043 is a high performance switch chip that supports DP1.3 or 4 single-ended DDR channels. It is a high-speed differential 1-to-2 switch chip and able to provide 2-to-1 MUX function by selecting 1 (Port A) out of two differential ports (Port B or C) for other applications. The device’s pinouts are optimized for USB3.1 type C DeMUX application and achieve very low crosstalk to meet the stringent type C crosstalk spec. CBTU02043 is available in 1.6 mm x 2.4 mm x 0.5 mm HUQFN16 package with 0.4 mm pitch.

Why Used

  • VDD Power Supply voltage range: 1.62 V to 3.63 V
  • Low current consumption:
    • 200 µA (typ) for active mode
    • 3 µA (typ) for power-saving
  • CMOS SEL and XSD pins
  • Back current protection on all I/O pins of these switches
  • Patent pending high performance analog pass-gate technology

Where Used

  • Mobile and PC applications
  • 1 port USB3.1, PCIe-Gen3 High Speed Serial Interface Applications
  • Smartphone type C application

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I²C Bus Controller with PCF8584

 

PCF8584 Block Diagram

PCF8584 Block Diagram

 PCF8584 allows parallel-bus systems to communicate bidirectionally with the I²C-bus. It is an integrated circuit designed in CMOS technology which serves as an interface between most standard parallel-bus microcontrollers/microprocessors and the serial I²C-bus. Also, it provides both master and slave functions.

Communication with the I²C-bus is carried out on a byte-wise basis using interrupt or polled handshake. It controls all the I²C-bus specific sequences, protocol, arbitration and timing.

Why Used

  • Compatible with most parallel-bus microcontrollers/microprocessors including 8049, 8051, 6800, 68000 and Z80
  • Parallel-bus to I²C-bus protocol converter and interface
  • Both master and slave functions
  • Programmable interrupt vector
  • Automatic detection and adaption to bus interface type

Where Used

  • Hand-held radio equipment in common emitter class-AB operation for 900 MHz Time Division Multiple Axis (TDMA) communication systems.

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Parallel Bus to 1 Channel Fm+ I2C-bus Controller

PCA9661 Block Diagram

PCA9661 Block Diagram

PCA966 is a fourth generation bus controller designed for data intensive I²C-bus data transfer. It is an advanced single master mode I²C-bus controller. As an 8-bit parallel-bus to I²C-bus protocol converter, PCA9661 can be configured to communicate with up to 64 slaves in one serial sequence with no intervention from the CPU. The controller also has a sequence loop control feature that allows it to automatically retransmit a stored sequence.

The controller parallel bus interface runs at 3.3 V and the I²C-bus I/Os logic levels are referenced to a dedicated VDD(IO) input pin with a range of 3.0 V to 5.5 V.

Why Used

  • 1 Mbit/s and up to 30 mA SCL/SDA IOL Fast-mode Plus (Fm+) capability
  • Parallel-bus to I²C-bus protocol converter and interface
  • Internal oscillator trimmed to 1 % accuracy reduces external components
  • 4352-byte buffer for the Fm+ channel
  • Three levels of reset: individual software channel reset, global software reset, global hardware RESET pin

Where Used

  • Entertainment systems
  • LED matrix control
  • Data intensive I²C-bus transfers
  • Add additional I²C-bus ports to controllers/processors that need multiple I²C-bus ports
  • Converts 8 bits of parallel data to serial data stream to prevent having to run a large number of traces across the entire printed-circuit board

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5 Gbps rail-to-rail Low Insertion Loss Switch

5 Gbps Rail-to-Rail Low Insertion Loss Switch

5 Gbps Rail-to-Rail Low Insertion Loss Switch

5 Gbps rail-to-rail low insertion loss switch is the CBTL02GP023 device that supports 5 Gbps USB3.0 signals and large swing USB2 or UART signals in dongle or plug applications. It is one port high performance 5 Gbps rail-to-rail low insertion loss 4x SPST switch chip optimized to interface USB3.0 signals with high voltage off isolation.

Why Used

  • VDD Power Supply voltage range in the dongle or plug:
    • 2.7 V (min) to 3.5 V (max)
  • One port (two differential channels) 5 Gbps rail-to-rail low insertion loss switch
  • Differential channels:
    • Low insertion loss: -1.5 dB at 2.5 GHz; -1 dB at 100 MHz
    • Low return loss: < -15 dB at 2.5 GHz
    • Low ON-state resistance: 11 Ω (typ)
    • Bandwidth: 7 GHz (typ)
      Low off-state isolation: -16 dB at 2.5 GHz; -40 dB at 100 MHz
      Low DDNEXT crosstalk: < -35 dB at 2.5 GHz and 500 MHz
    • VIC common mode input voltage: 0 to VDD
    • Differential input voltage VID: 1.2 V (Max)
    • Intra-pair skew: 6 ps (typ)
  • Back current protection on all I/O pins
  • All channels support rail-to-rail input voltage

Where Used

  • USB3.0 signals
  • USB2 signals
  • UART signals

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