PCF8564A Block Diagram
With a wide clock operating voltage range 1.0V to 5.5V, the PCF8564A device is a programmable clock output, interrupt output and voltage low detector. It is a CMOS real-time and calendar optimized for low power consumption. All addresses and data are transferred serially via a two-line bidirectional I²C bus. Maximum bus speed is 400 kbit/s. The built-in word address register is incremented automatically after each written or read data byte.
- Programmable clock output for peripheral devices (32.768 kHz, 1.024 kHz, 32 Hz, and 1 Hz)
- Provides year, month, day, weekday, hours, minutes, and seconds based on a 32.768 kHz quartz crystal
- 400 kHz two-wire I²C interface (1.8 V and 5.5 V)
- Low back-up current typical 250 nA at 3.0 V and 25℃
- Alarm and timer functions
- Portable instruments
- Electronic metering
- Battery powered products
- Timing devices
- Time of the day tracking
- Process timing
NTS0101 Block Diagram
A dual supply translating transceiver is used for translating voltage level between any of the voltage nodes. For NTS0101, it translates 1.8 V, 2.5 V, 3.3 V, and 5.0 V voltage nodes that makes it flexible. The VCC(A) can be supplied at any voltage between 1.65 V and 3.6 V while VCC(B) can be supplied at any voltage between 2.3 V and 5.5 V.
The device features two 1-bit input-output ports (A and B), one output enable input (OE) and two supply pins (VCC(A) and VCC(B)), and fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.
- IOFF circuitry provides partial Power-down mode operation
Inputs accept voltages up to 5.5 V
- ESD protection:
- HBM JESD22-A114E Class 2 exceeds 2500 V for A port\
- HBM JESD22-A114E Class 3B exceeds 8000 V for B port
- MM JESD22-A115-A exceeds 200 V
- CDM JESD22-C101E exceeds 1500 V
- Wide supply voltage range:
- VCC(A): 1.65 V to 3.6 V and VCC(B): 2.3 V to 5.5 V
- Maximum data rates:
- Push-pull: 50 Mbps
PCA9570 Block Diagram
An operating voltage range of 1.1 V to 3.6 V, the PCA9570 CMOS device operates at 1 MHZ I2C-bus speeds while maintaining backward compatibility to Fast-mode (400 kHz) and Standard-mode (100 kHz). It provides 4 bits of General Purpose parallel Output (GPO) expansion in low voltage processor and handheld battery powered mobile applications. The PCA9570 is a streamlined GPO that consists of 4-bit push-pull outputs that offer low current consumption, small packaging options and a low operating voltage range. The latched outputs are symmetrical 4 mA current drive capability at 3.3 V to drive various control logic . The PCA9570 output expander provides a simple solution when additional outputs are needed while keeping interconnections and floor space to a minimum, for example, in battery powered mobile applications where PCBs are crowded for interfacing to sensors, push buttons, etc.
The PCA9570 contains an internal Power-On Reset (POR) and a Software Reset feature that initializes the device to its default state.
- Compliant with the I2C-bus Fast and Standard modes
- 1 MHz I²C-bus interface with 6 mA SDA sink capability for lightly loaded buses (<100 pF) and improved power consumption
- Latched outputs with a sink/source capability of 4 mA at 3.3 V
- 1.1 V to 3.6 V operation
- Readable device ID (manufacturer, device type, and revision)
- Portable medical equipment
- Portable instrumentation and test measurement
- Smart phones and tablets
SAF5400 Block Diagram
The SAF5400 modem is able to relay up to 2000 Basic Safety Message [BSM] verifications per second on chip to better range for transmitted and received messages. This number can be augmented further with NXP’s i.MX applications processor, which is offered as part of the V2X System solution. The RoadLINK SAF5400 is an automotive qualified single chip DSRC modem for V2X applications. The SAF5400 also integrates NXP’s high-performance secure element technology to address the proposed wireless V2X security requirements.
- Single channel handling for 802.11p reception/transmission.
- Compliant with ETSI EN 302663, ETSI EN 302571
- Compliant with ARIB T-109M
- Compliant with IEEE 802.11p, IEEE 1609.4
- Optional ECDSA verification: 2000 messages/sec (Brainpool/NIST curves 256 bits)
MR2001 Block Diagram
The MR2001 multi-channel 77 GHz radar transceiver chipset supports fast modulation with simultaneous channels enabling spatial resolution and detection accuracy across a wide field-of-view and consumes minimal power. It is a high-performance 77 GHz radar transceiver and scalable for multi-channel operation enabling a single radar platform with electronic beam steering and wide field-of-view to support long, mid-, and short-range radar applications for auto safety, communications infrastructure, and industrial systems. When combined with the MPC577xK MCU, it offers a complete system-level radar solution for ADAS applications.
- Supply voltage 3.3 V
- Supply current typ. 240 mA
- Power dissipation typ. 0.8 W
- 76 GHz to 77 GHz RX input
- Saturation detectors
- Automotive proximity radar
- LRR, MRR and SRR
- Industrial surveillance and security