Monthly Archives: December 2016

Hi-Speed Universal Serial Bus host controller for embedded applications

Integrating one Enhanced Host Controller Interface (EHCI), one Transaction Translator (TT) and three transceivers, the SAF1760 is a Hi-Speed Universal Serial Bus (USB) host controller with a generic processor interface. The EHCI portion of the SAF1760 is adapted from Enhanced Host Controller Interface Specification for Universal Serial Bus Rev. 1.0.

For being a slave host, the SAF1760 does not require bus-mastering capabilities of the host system bus. The interface can be configured which ensures compatibility with a variety of processors. Using Programmed Input/Output (PIO) or Direct memory Access (DMA), data transfer can be performed on 16 bits or 32 bits with major control signals configurable as active LOW or active HIGH.

Block Diagram

Block Diagram

Why Used

  • Automotive qualified in accordance with AEC-Q100
  • Contains three integrated Hi-Speed USB transceivers that support high-speed, full-speed and low-speed modes
  • Integrated Phase-Locked Loop (PLL) with a 12 MHz crystal or an external clock input
  • Tolerant I/O for low voltage CPU interface (1.65 V to 3.6 V)
  • Built-in configurable overcurrent circuitry (digital or analog overcurrent protection)

Where Used

  • Hi-Speed USB compliant host controller connected to most of the CPUs present in the market today
  • Automotive Applications

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CC logic for USB Type-C applications

A small thin low power CC logic chip, PTN5150A supports the USB Type-C connector application with Configuration Channel (CC) control logic detection and indication functions. It supports Type-C to USB legacy cables and adapters defined in USB Type-C Spec.

This logic chip can be configured to dual role, host, or device mode through external configuration pin or through I²C interface. Upon detection of plug orientation, pin ID will indicate if PTN5150A is working under either host role or deice role, and other status will also be reflected in I²C registers.

Functional diagram

Functional diagram

Why Used

  • Compatible with legacy OTG hardware and software
  • Support plug, orientation, role and charging current detection
  • Report detail port states and accessory modes in I²C registers
  • Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA
  • High ESD protection for VBUS and CC1/2 pins

Where Used

  • Tablets/Mobile Devices
  • Ultrabook/Notebook Computers
  • Docking Stations

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Scalable Entry Level 32-bit Microcontroller (MCU) based on ARM® Cortex®-M0+/M0 Cores

Operating up to 50 MHz, the LPC1115FET48 is an ARM Cortex-M0 microcontroller that features unique onchip API-driven power profiles which provide users with ready-to-use power management templates. The peripheral complement of the LPC1115FET48 includes 64 kB of flash memory, 8 kB of data memory, one Fast-mode Plus I²C-bus interface, one RS-485/EIA-485 UART, two SPI interfaces with SSP features, four general purpose counter/timers, a 10-bit ADC, and 42 general purpose I/O pins.

CPU efficiency and lowest active current, the power profiles enable maximum operating frequency through the entire voltage range from 1.8 V to 3.6 V without compromising speed or functionality. These optimize the CPU performance. PLL allows CPU operation up to the maximum CPU rate without the need for a high-frequency crystal. May be run from the system oscillator or the internal RC oscillator.

Block Diagram

Block Diagram

Why Used

  • ARM Cortex-M0 built-in Nested Vectored Interrupt Controller (NVIC)
  • Serial Wire Debug
  • In-System Programming (ISP) and In-Application Programming (IAP)
  • Integrated PMU (Power Management Unit) to minimize power consumption
  • Power profiles residing in boot ROM (LPC1100Land LPC1100XL series only)

Where Used

  • eMetering
  • Alarm systems
  • Lighting
  • White goods

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