Complying with USB PD and Type-C specifications and delta updates of PD spec, PTN5100 is a single port USB Type-C Power Delivery (PD) PHY and Protocol IC that provides Type-C Configuration channel interface and USB PD Physical and Protocol layer functions to a System PD Port Policy Controller (Policy Engine and Device Policy Manager, Alternate mode controller). This IC is targeted for a wide range of platforms and PC Accessories applications.
Implementing VCONN low RON switch with register programmable Forward Current protection feature, PTN5100 can support system realization of the following PD roles: (i) Provider (P) only, (ii) Provider/Consumer (P/C) (iii) Consumer only (C) (iv) Consumer/Provider (C/P). It can be programmed to operate in Type-C specific Upstream Facing Port (UFP), Downstream Facing Port (DFP) or Dual Role Port (DRP) role.
PTN5100 block diagram
- CC detection/indication scheme based on Type-C role
- Capable of maximum current delivery of 1 A over 2.7 V to -5.5 V
- Back current protection on all pins when PTN5100 is unpowered
- Delivers up to 30 mA (max) for powering Policy controller MCU
- ESD 8 kV HBM, 1 kV CDM
- PC platforms: Notebook PCs, Desktop PCs, Ultrabooks, Chromebooks
- Tablets, 2:1 Convertibles, Smartphones and Portable devices
- PC accessories/peripherals: Docking, Mobile Monitors, Multi-Function Monitors, Portable/External hard drives, Cable adaptors, Dongles and accessories, etc.
The PCA8574/74A devices provide general-purpose remote I/O expansion via the two-wire bidirectional I²C‑bus (serial clock (SCL), serial data (SDA)). They consist of eight quasi-bidirectional ports, 400 kHz I²C‑bus interface, three hardware address inputs and interrupt output operating between 2.3 V and 5.5 V. The system master can read from the input port or write to the output port through a single register.
Except for the different fixed portion of the slave address, the PCA8574 and PCA8574A are identical. The three hardware address pins allow eight of each device to be on the same I²C‑bus, so there can be up to 16 of these I/O expanders PCA8574/74A together on the same I²C‑bus, supporting up to 128 I/Os (for example, 128 LEDs).
Product Block Diagram
- Operating supply voltage 2.3 V to 5.5 V with 5.5 V tolerant I/Os held to VDD with 100 μA current source
- Latched outputs with 25 mA sink capability for directly driving LEDs
- Total package sink capability of 200 m
- Active LOW open-drain interrupt output
- SD protection exceeds 2000 V HBM per JESD22-A114 and 1000 V CDM per JESD22-C101
- LED signs and displays
- Key pads
- Industrial control
- Medical equipment
Supporting data signaling rate of 5 Gbit/s, the PTN36221A is a small, low power, high performance SuperSpeed USB 3.0 redriver that enhances signal quality by performing receive equalization on the deteriorated input signal followed by transmit de-emphasis maximizing system link performance.
Without host software intervention, the PTN36221A has built-in advanced power management capability that enables significant power saving under various different USB 3.0 Low-power modes (U2/U3). The device performs these actions without host software intervention and conserves power.
PTN36221A context diagrams
- Supports Low Frequency Periodic Signaling (LFPS) and is USB3.0 compatible
- Adjustable receive equalization, transmit de-emphasis and output swing functions
- Automatic receiver termination detection
- Support hot plug with automatic receiver detect
- ESD 8 kV HBM, 1 kV CDM for data path
- Smart phones, tablets
- Active cables
- Notebook/netbook/nettop platforms
- Server and storage platforms
With a common gate (GREF) and a reference transistor (SREF and DREF), the GTL2003 provides eight NMOS pass transistors (Sn and Dn) and allows bidirectional voltage translations between 0.8 V and 5.0 V without use of a direction pin. When properly biased, voltage translation below 0.8 V can be achieved.
All transistors have the same electrical characteristics and there is minimal deviation from one output to another in voltage or propagation delay. This is a benefit over discrete transistor voltage translation solutions, since the fabrication of the transistors is symmetrical. Because all transistors in the device are identical, SREF and DREF can be located on any of the other eight matched Sn/Dn transistors, allowing for easier board layout.
Product Block Diagram
- Allows voltage level translation between 0.8 V, 0.9 V, 1.0 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V, and 5 V buses which allows direct interface with GTL, GTL+, LVTTL/TTL and 5 V CMOS levels
- Supports hot insertion
- No power supply required: will not latch up
- ESD protection exceeds 2000 V HBM per JESD22-A114, and 1000 V CDM per JESD22-C101
- Any application that requires bidirectional or unidirectional voltage level translation from any voltage from 0.8 V to 5.0 V to any voltage from 0.8 V to 5.0 V
- The open-drain construction with no direction pin is ideal for bidirectional low voltage (for example, 0.8 V, 0.9 V, 1.0 V, 1.2 V, 1.5 V, or 1.8 V) processor I²C-bus port translation to the normal 3.3 V and/or 5.0 V I²C-bus signal levels or GTL/GTL+ translation to LVTTL/TTL signal levels.