Monthly Archives: July 2016

LCD driver for low multiplex rates

Designed to drive Liquid Crystal Displays (LCDs) with low multiplex rates, the OM4068 is a low-power CMOS LCD driver that generates the drive signals for any static or multiplexed LCD containing up to three backplanes and up to 32 segment lines and can be easily cascaded for larger LCD applications.

OM4068 can drive any static or multiplexed LCD containing up to three backplanes and up to 96 segments. A 3-line bus structure enables serial data transfer with most microprocessors/microcontrollers. The display configurations possible with the OM4068 depend on the number of active backplane outputs required.

Product Block Diagram

Product Block Diagram

Why Used

  • Selectable backplane drive configuration: static or 2 or 3 backplane multiplexing
  • On-chip generation of intermediate LCD bias voltages
  • Compatible with any 4-bit, 8-bit or 16-bit microprocessors/microcontrollers
  • May be cascaded for large LCD applications
  • Low power consumption, suitable for battery operated systems
  • No external components needed by the oscillator

Where Used

  • Telecom equipment
  • Portable instruments
  • Alarm systems
  • Automotive equipment

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Dual bidirectional bus buffer

Having different voltage and current levels, P82B96 can interface IC-bus logic signals to similar buses. The P82B96 is a bipolar IC that creates a non-latching, bidirectional, logic interface between the normal IC-bus and a range of other bus configurations.

Because separate directional Tx and Rx signals are provided, transmitting SDA and SCL signals via balanced transmission lines (twisted pairs) or with galvanic isolation (opto-coupling) is simple. The Tx and Rx signals may be directly connected, without causing latching, to provide an alternative bidirectional signal line with IC-bus properties.

Product Block Diagram

Product Block Diagram

Why Used

  • Isolates capacitance allowing 400 pF on Sx/Sy side and 4000 pF on Tx/Ty side
  • Supply voltage range of 2 V to 15 V with IC-bus logic levels on Sx/Sy side independent of supply voltage
  • Low power supply current
  • ESD protection exceeds 3500 V HBM per JESD22-A114, 250 V DIP package, 400 V SO package MM per JESD22-A115, and 1000 V CDM per JESD22-C101
  • Latch-up free (bipolar process with no latching structures)

Where Used

  • Interface between I²C-buses operating at different logic levels (for example, 5 V and 3 V or 15 V)
  • Interface between I²C-bus and SMBus (350 µA) standard
  • Simple conversion of I²C-bus SDA or SCL signals to multi-drop differential bus hardware, for example, via compatible PCA82C250
  • Interfaces with opto-couplers to provide opto-isolation between I²C-bus nodes up to 400 kHz

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UCODE I²C

NXP Semiconductors introduces now the possibility to combine 2 independent UHF Interfaces (following EPC gen 2 standard) with an I²C interface with the UCODE I²C product. It has a large memory which can be then read or write via both interfaces.

The UCODE has an I²C functionality which enables the standard EPC gen 2 functionalities to be linked to an electronic device microprocessor. The UCODE I²C product opens a whole new range of application by linking the rich functionalities of the EPC gen 2 standards to the Electronics world.

Block Diagram

Block Diagram

Why Used

  • Compliant to EPCglobal Radio-Frequency Identity Protocols Class-1 Generation-2 UHF RFID Protocol for communications at 860 MHz to 960 MHz version 1.2.0
  • Supports Standard (100 kHz) and Fast (400 kHz) mode
  • Memory read protection
  • Wide RF interface temperature range: -40 °C up to +85 °C
  • 32-bit KILL password to permanently disable the tag

Where Used

  • Firmware downloads
  • Return management
  • Counterfeit protection and authentication
  • Production information
  • Theft protection and deterrence
  • Production automation
  • Device customization/product configuration
  • Offline Diagnostics

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SPI-bus Real-Time Clock and calendar

Operating up to 125 °C temperature, the PCA21125 is a CMOS Real-Time Clock (RTC) and calendar optimized for low-power consumption. Alarm and timer functions are available with the possibility to generate a wake-up signal on the interrupt pin.

The PCA21125 contains 16 8-bit registers with an auto-incrementing address register, an on-chip 32.768 kHz oscillator with one integrated capacitor, a frequency divider which provides the source clock for the RTC, a programmable clock output, and a 6 MHz SPI-bus.

Block diagram of PCA21125

Block diagram of PCA21125

Why Used

  • AEC Q100 compliant for automotive applications
  • Provides year, month, day, weekday, hours, minutes, and seconds based on 32.768 kHz quartz crystal
  • Freely programmable timer with interrupt capability
  • Freely programmable alarm function with interrupt capability
  • Internal Power-On Reset (POR)

Where Used

  • Automotive time keeping
  • Metering

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